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DTSTAMP:20211207T054804Z
LOCATION:225-226
DTSTART;TZID=America/Chicago:20211117T110000
DTEND;TZID=America/Chicago:20211117T113000
UID:submissions.supercomputing.org_SC21_sess151_pap150@linklings.com
SUMMARY:Accelerating Bandwidth-Bound Deep Learning Inference with Main-Mem
 ory Accelerators
DESCRIPTION:Paper\n\nAccelerating Bandwidth-Bound Deep Learning Inference 
 with Main-Memory Accelerators\n\nCho, Jung, Erez\n\nMatrix-matrix multipli
 cation operations (GEMMs) are important in many HPC and machine-learning a
 pplications. They are often mapped to discrete accelerators (e.g., GPUs) t
 o improve performance. We find, however, that large tall/skinny and fat/sh
 ort matrices benefit little from discrete acceleration and also do not per
 form well on a CPU. Such matrices are prevalent in important workloads, su
 ch as deep-learning inference within large-scale datacenters. We demonstra
 te the large potential of accelerating these GEMMs with processing in the 
 main CPU memory, where processing-in-memory units (PIMs) take advantage of
  otherwise untapped bandwidth without requiring data copies. We develop a 
 novel GEMM execution flow and corresponding memory-side address-generation
  logic that exploits GEMM locality and enables long-running PIM kernels de
 spite the complex address-mapping functions employed by the CPU. Our evalu
 ation of recent recommendation and language models shows that StepStone PI
 M outperforms a fast CPU and prior main-memory acceleration approaches.\n\
 nTag: Accelerator-based Architectures\n\nRegistration Category: Tech Progr
 am Reg Pass
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