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DTSTAMP:20211207T054745Z
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DTSTART;TZID=America/Chicago:20211116T103000
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UID:submissions.supercomputing.org_SC21_sess262_exforum106@linklings.com
SUMMARY:The Role of Embedded AI/ML Cores in Hardware-Based Accelerators
DESCRIPTION:Exhibitor Forum\n\nThe Role of Embedded AI/ML Cores in Hardwar
 e-Based Accelerators\n\nSchweitzer\n\n“When all you have is a hammer, all 
 the world’s a nail.” For decades in computing, all we had was the CPU, so 
 every computational problem was viewed from this perspective. Eventually, 
 math co-processors came along to offload instruction cycle-intensive math 
 operations. This then led to offload solutions via graphical processing un
 its (GPUs), field-programmable gate arrays (FPGAs), and, more recently, ap
 plication-specific integrated circuits (ASICs). Specialized Artificial Int
 elligence (AI)/Machine Learning (MLP) Processing cores have also been deve
 loped in recent years, which run on GPUs, FPGAs and/or ASICs. These comput
 ational platforms specialize in specific HPC problem domains where their c
 omputational resources offer the best ratio of results to power consumptio
 n. For FPGAs, HPC problems like genomic analysis or video data can be up t
 o 100x faster than GPUs. Various types of machine learning map exceptional
 ly well into MLP cores, dramatically improve training time. This talk will
  examine each of these computational platforms, but it will focus on the m
 ost recent two platforms, ASICs and FPGAs with enhanced MLP cores, diving 
 into why these platforms, for specific problem domains, are so much better
  than earlier competing platforms.\n\nTag: Architectures\n\nRegistration C
 ategory: Tech Program Reg Pass, Exhibit Hall Only
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