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DTSTAMP:20211207T055401Z
LOCATION:Second Floor Atrium
DTSTART;TZID=America/Chicago:20211118T083000
DTEND;TZID=America/Chicago:20211118T170000
UID:submissions.supercomputing.org_SC21_sess280_rpost121@linklings.com
SUMMARY:Accurate Throughput Prediction of Basic Blocks on Recent Intel Mic
 roarchitectures
DESCRIPTION:Posters, Research Posters\n\nAccurate Throughput Prediction of
  Basic Blocks on Recent Intel Microarchitectures\n\nAbel, Reineke\n\nTools
  to predict the throughput of basic blocks on a specific microarchitecture
  are useful to optimize software performance and to build optimizing compi
 lers. In recent work, several such tools have been proposed. The accuracy 
 of their predictions, however, has been shown to be relatively low. To a s
 ignificant degree, these inaccuracies are due to elements of the pipelines
  of recent CPUs that are not taken into account by previous tools. We prop
 ose a new parametric pipeline model that is significantly more detailed th
 an previous models. Based on this model, we develop a simulator for predic
 ting the throughput of basic blocks.\n\nOur tool supports all Intel Core m
 icroarchitecture generations released in the last decade. We evaluate it o
 n an improved version of the BHive benchmark suite. On many recent microar
 chitectures, its predictions are more accurate than the predictions of sta
 te-of-the-art tools by more than an order of magnitude.\n\nRegistration Ca
 tegory: Tech Program Reg Pass, Exhibit Hall Only
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