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UID:submissions.supercomputing.org_SC21_sess431_ws_llvmf104@linklings.com
SUMMARY:Toward an Automated Hardware Pipelining LLVM Pass Infrastructure
DESCRIPTION:Workshop\n\nToward an Automated Hardware Pipelining LLVM Pass 
 Infrastructure\n\nLeidel, Kabrick, Donofrio\n\nThe many nuances associated
  with hardware development have fostered a development environment exclusi
 ve to those possessing extensive knowledge on the low-level implementation
  details necessary for an effective design.  Allowing users to focus on th
 e design aspects specific to the domain they work in by abstracting the lo
 w-level implementation details could prove invaluable to their success\n\n
 This work describes the StoneCutter infrastructure, along with its encompa
 ssing OpenSoC System Architect suite of tools,  provide users with a high-
 level, C-like syntax for rapidly designing ISAs.  The compiler is responsi
 ble for ingesting instruction definitions and generating optimized Chisel 
 HDL output as well as target-specific LLVM-linked compiler capable of exec
 uting binaries on the prototype ISA.  During the codegen phase, the necess
 ary control signals are subsequently generated and then used to automatica
 lly pipeline the entire ISA based on the design's I/O, arithmetic operatio
 ns, and flow-control.\n\nTag: Parallel Programming Systems\n\nRegistration
  Category: Workshop Reg Pass
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