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DTSTAMP:20211207T055339Z
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DTSTART;TZID=America/Chicago:20211114T140400
DTEND;TZID=America/Chicago:20211114T141100
UID:submissions.supercomputing.org_SC21_sess431_ws_llvmlt101@linklings.com
SUMMARY:Neural Instruction Combiner for LLVM
DESCRIPTION:Workshop\n\nNeural Instruction Combiner for LLVM\n\nmannarswam
 y, Das\n\nInstruction combiner (IC) is a critical optimization pass, which
  replaces a sequence of instructions with an equivalent and optimized inst
 ruction sequence at basic block level. There can be thousands of IC patter
 ns which need to be frequently updated as new coding styles/applications e
 volve over time. This makes the IC optimization pass error prone.  To miti
 gate these challenges of traditional IC, we design a Neural Instruction Co
 mbiner (NIC) and demonstrate its feasibility by integrating it into the LL
 VM compiler pipeline.  NIC leverages neural machine translation seq2seq mo
 del technique for generating optimized encoded IR sequence from the unopti
 mized encoded IR sequence. We improve the standard attention mechanism wit
 h a compiler guided attention approach. To the best of our knowledge, ours
  is the first work demonstrating the feasibility of a neural instruction c
 ombiner for LLVM.  Our early results show that NIC can achieve Bleu precis
 ion of 0.94 and   exact match accuracy of 0.83.\n\nTag: Parallel Programmi
 ng Systems\n\nRegistration Category: Workshop Reg Pass
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