BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20211207T055338Z
LOCATION:226
DTSTART;TZID=America/Chicago:20211114T090000
DTEND;TZID=America/Chicago:20211114T173000
UID:submissions.supercomputing.org_SC21_sess431@linklings.com
SUMMARY:LLVM-HPC2021: The Seventh Workshop on the LLVM Compiler Infrastruc
 ture in HPC
DESCRIPTION:Workshop\n\nFlacc: Toward OpenACC Support for Fortran in the L
 LVM Ecosystem\n\nClement, Vetter\n\nOpenACC is a directive-based programmi
 ng model for heterogeneous accelerators initially launched in 2010 to prov
 ide a portable solution at a level of abstraction above OpenCL, CUDA, and 
 other lower-level programming models.  Various implementations of OpenACC 
 for C, C++, and Fortran exist; however, ...\n\n---------------------\nFaci
 litating CoDesign with Automatic Code Similarity Learning\n\nNguyen, Stroh
 maier, Shalf\n\nAutomating the workload characterization process is increa
 singly important in hardware design. Although compiler tools can automatic
 ally collect profiling data and predict performance behaviors, the process
  has to be repeated for each potential design. Such challenge is exacerbat
 ed by the fast growi...\n\n---------------------\nImplementation of SYCL™ 
 Specialization Constants for Intel GPUs\n\nBader, Sachkov\n\nWith the emer
 gence of new hardware architectures in HPC systems, we observe raised dema
 nd in software solutions allowing developers efficiently use system’s reso
 urces. SYCL programming model [1] for heterogenous systems provides specia
 lization constants - runtime variables, which are invariant under...\n\n--
 -------------------\nOptimizing Data Layout Transformations in MLIR\n\nLak
 shminarasimhan, Ravishankar, Hall, Sadayappan\n\nWe present an optimized c
 ode generation for data layout transformations in MLIR. For an input tenso
 r of arbitrary order (dimensionality) and a given index permutation sequen
 ce, our code generator synthesizes high-performance vector code for the co
 rresponding transposition with progressive lowering i...\n\n--------------
 -------\nOpenMP-Aware MHP Analysis for Improved Static Data-Race Detection
 \n\nBora, Vaishay, Joshi, Upadrasta\n\nData-races are a common source of b
 ugs in parallel programs. To detect race conditions in OpenMP programs and
  improve turnaround time and/or developer productivity, we present a data-
 flow analysis based, fast, static data-race checker in the LLVM compiler f
 ramework. Our tool can detect races in the ...\n\n---------------------\nL
 LVM-HPC2021 Welcome\n\nLeidel\n\n---------------------\nLLVM Afternoon Bre
 ak (3-3:30)\n\n\n\n---------------------\nExtending LLVM IR for DPC++ Matr
 ix Support: A Case Study with Intel® Advanced Matrix Extensions (Intel® AM
 X)\n\nKhaldi, Luo, Yu, Sotkin, Morais...\n\nIn this paper, we introduce a 
 DPC++ matrix ex-tension to unify different tensor hardware: Intel® Advance
 d Matrix Extensions (Intel® AMX) to CPUs, NVIDIA® TPUs, IBM® POWER® MMA, e
 tc.  These tensor hardware units are usually accessed by low-level intrins
 ics or assembly to perform matrix operations.  I...\n\n-------------------
 --\nToward an Automated Hardware Pipelining LLVM Pass Infrastructure\n\nLe
 idel, Kabrick, Donofrio\n\nThe many nuances associated with hardware devel
 opment have fostered a development environment exclusive to those possessi
 ng extensive knowledge on the low-level implementation details necessary f
 or an effective design.  Allowing users to focus on the design aspects spe
 cific to the domain they work i...\n\n---------------------\nLLVM Morning 
 Break (10-10:30)\n\n\n\n---------------------\nLLVM Lunch Break (12:30-2)\
 n\n\n\n---------------------\nRemote OpenMP Offloading\n\nPatel, Doerfert\
 n\nIn this work we show that the OpenMP accelerator offloading model is su
 fficient to seamlessly and efficiently utilize more than a single compute 
 node, and its connected accelerators.  \n\nWithout source code or compiler
  modifications we run an OpenMP offload capable program on a remote CPU, o
 r remote ...\n\n---------------------\nORAQL: Optimistic Responses to Alia
 s Queries in LLVM\n\nHueckelheim, Doerfert\n\nAlias analysis is a prerequi
 site to many compiler optimizations for high performance and parallel prog
 rams. Alias analysis at compile time is hard and necessarily imperfect. Th
 is often means that a problematic query is conservatively answered with ma
 y-alias, even in situations where a definitive mus...\n\n-----------------
 ----\nLoop Transformations Using Clang's Abstract Syntax Tree\n\nKruse\n\n
 OpenMP 5.1 introduced the first loop nest transformation directives unroll
  and tile, and more are expected to be included in OpenMP 6.0.  We discuss
  the two Abstract Syntax Tree (AST) representations used by Clang's implem
 entation that is currently under development.  The first representation is
  des...\n\n---------------------\nLLVM-HPC2021: The Seventh Workshop on th
 e LLVM Compiler Infrastructure in HPC\n\nPerry-Holby, Brodman, Leidel, McC
 ormick\n\nLLVM, winner of the 2012 ACM Software System Award, has become a
 n integral part of the software-development ecosystem for optimizing compi
 lers, dynamic-language execution engines, source-code analysis and transfo
 rmation tools, debuggers and linkers and a whole host of programming-langu
 age and toolch...\n\n---------------------\nA High Performance Sparse Tens
 or Algebra Compiler in MLIR\n\nTian, Guo, Li, Ren, Kestor\n\nSparse tensor
  algebra is widely used in many applications.  The performance of sparse t
 ensor algebra kernels strongly depends on the characteristics of the input
  tensors, hence many storage formats are designed for tensors to achieve o
 ptimal performance for particular applications/architectures, whi...\n\n--
 -------------------\nEnzyme: Fast, Language Agnostic, Differentiation of P
 arallel Programs in LLVM\n\nMoses, Churavy\n\nDerivatives are key to algor
 ithms in scientific computing and machine learning such as optimization, u
 ncertainty quantification, and stability analysis. Enzyme is a LLVM compil
 er plugin for reverse-mode automatic differentiation (AD) and thus generat
 es fast gradients of programs in a variety of lang...\n\n-----------------
 ----\nNeural Instruction Combiner for LLVM\n\nmannarswamy, Das\n\nInstruct
 ion combiner (IC) is a critical optimization pass, which replaces a sequen
 ce of instructions with an equivalent and optimized instruction sequence a
 t basic block level. There can be thousands of IC patterns which need to b
 e frequently updated as new coding styles/applications evolve over tim...\
 n\n---------------------\nLLVM-HPC2021 Invited Talk\n\nWong\n\n-----------
 ----------\nAutomatic and Customizable Code Rewriting and Refactoring with
  Clang\n\nJohnson, Doerfert\n\nRefactoring code for cleanliness, API chang
 es, and new programming models is a common, yet time-consuming task for ap
 plication developers. Many of the changes done while refactoring are simpl
 e and mechanical and can be easily automated. Other changes, however, stil
 l require input from a human progra...\n\n---------------------\nLLVM-HPC2
 021 Afternoon Welcome Back\n\nLeidel\n\n\nTag: Parallel Programming System
 s\n\nRegistration Category: Workshop Reg Pass
END:VEVENT
END:VCALENDAR
